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Optrex DMF666AN http://forum.lcdinfo.com/viewtopic.php?f=6&t=1437 |
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Author: | d-frag-r [ Sat Dec 17, 2005 7:32 ] |
Post subject: | Optrex DMF666AN |
DMF666AN K-EW1 E91964 3134L OPTREX JAPAN 88Z2M3 I picked up this display earlier today for $4, so I'm not expecting much from it... but if I could get it to work, it'd be pretty bitchin'. What I've got so far is that there's a single 18x1 header on it for data and I've traced out the two pads that control the backlight. There are three HD61105 controller ICs and 16 HD61104 collumn ICs onboard. Code: LAYOUT; ____________________________________________________________________ | ____ ____ ____ ____ ____ ____ ____ ____ | | | | | | | | | | | | | | | | | | | | |1104| |1104| |1104| |1104| |1104| |1104| |1104| |1104| | | |____| |____| |____| |____| |____| |____| |____| |____| | | | | _________ | | | | | | |***************| | HD61105 | | | |***************| |_________| DMF666AN K-EW1 E91964 3134L| | |*****STUFF*****| OPTREX JAPAN | | |***************| _________ | | |***************| | | | | |******| .................. | HD61105 | _________ | | |******| |||||||||||||||||| |_________| | | | | | HD61105 | | | 88Z2M3 |_________| | | | | ____ ____ ____ ____ ____ ____ ____ ____ | | | | | | | | | | | | | | | | | | | | |1104| |1104| |1104| |1104| |1104| |1104| |1104| |1104| | | |____| |____| |____| |____| |____| |____| |____| |____| | |____________________________________________________________________| **'STUFF' consists of various 74HC ICs, resisters, and capasitors. **Board is scattered with test points I've googled about and found some old forums where people have asked for any information, but recieved no reply, so I'll try my luck here. Any datasheets/speculations/information at all is welcome [ as is kudos on the ASCII art ]. Cheers.[/code] |
Author: | d-frag-r [ Sat Dec 17, 2005 20:35 ] |
Post subject: | |
Code: http://chips.amphus.com/chips/pdf/230dm.pdf
That PDF tells me that this display has a 640x400 resolution. ... niiiice. |
Author: | d-frag-r [ Sun Dec 18, 2005 19:11 ] |
Post subject: | |
Code: http://www.eio.com/public/lcd/1085.html
640x400 dots (2x640x200 dual screen) VDD 5V VCC-VEE approx 25V (max 28V) (stabilized) VCC-Adj approx 23.6V (adjustable) -> negative voltages ref to GND! Pins 1 FLM 2 LP 3 CP 4 M 5 Vadj 6 VCC 7 VSS 8 VEE 9 DU0 (data upper half bit0) 10 DU1 (data upper half bit1) 11 DU2 (data upper half bit2) 12 DU3 (data upper half bit3) 13 DL0 (data lower half bit0) 14 DL1 15 DL2 16 DL3 17 P/N (positive negative image) 18 n.c. (no connection) 19 EL-foil 20 n.c. 21 EL-foil GOT IT! Now, because it's two panels in one, can LCDInfo drive it? Also, how would you guys suggest I go about wiring this baby up to the LPT port? Is it possable? |
Author: | coorz [ Sun Dec 18, 2005 21:29 ] |
Post subject: | |
You need a SED1335 controller and this; http://forum.lcdinfo.com/viewtopic.php?t=1348 |
Author: | d-frag-r [ Mon Dec 19, 2005 0:03 ] |
Post subject: | |
I would need to double the amount of RAM if I were to build my own controller, correct? 128k would be fine for a 640x200px display, but because it's a 640x400px display I'd need 256k. Would I need to deploy two controllers [ top/bottom fashion ], or would/could I piggy-back the RAM on Mark de Jong's circuit? |
Author: | coorz [ Mon Dec 19, 2005 0:10 ] |
Post subject: | |
I know the limitations of the SED1335 is 640x256, it might be possible to drive it all with latches, but i don't know how to do that. |
Author: | d-frag-r [ Tue Dec 20, 2005 5:55 ] |
Post subject: | |
How do you mean, drive it all with latches? Who would know how to do that? If I tie the clk and latch pins of two SED controllers, wouldn't they be in sync and then I could get one to drive top half and another to drive the bottom half? |
Author: | d-frag-r [ Wed Dec 21, 2005 0:56 ] |
Post subject: | |
Better yet, is there a chip that wires up like the SED1335, but can drive a larger display? |
Author: | d-frag-r [ Thu Dec 22, 2005 0:49 ] |
Post subject: | |
Would I be able to drive this display with a VESA port? Code: VESA Pinout;
Pin Name Description 1 PD0 DAC Pixel Data Bit 0 (PB) 2 PD1 DAC Pixel Data Bit 1 (PG) 3 PD2 DAC Pixel Data Bit 2 (PR) 4 PD3 DAC Pixel Data Bit 3 (PI) 5 PD4 DAC Pixel Data Bit 4 (SB) 6 PD5 DAC Pixel Data Bit 5 (SG) 7 PD6 DAC Pixel Data Bit 6 (SR) 8 PD7 DAC Pixel Data Bit 7 (SI) 9 CLK DAC Clock 10 BLK DAC Blanking 11 HSYNC Horizontal Sync 12 VSYNC Vertical Sync 13 GND Ground 14 GND Ground 15 GND Ground 16 GND Ground 17 Select Internal Video 18 Select Internal Sync 19 Select Internal Dot Clock 20 n/c Not used 21 GND Ground 22 GND Ground 23 GND Ground 24 GND Ground 25 n/c Not used 26 n/c Not used It has the 8 data pins I'm looking for and a clock pin, but I don't think I can use the hsync/vsync... I'd need a FRM source, tho. |
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