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Hi

I have been playing a bit with an OLED display 480x272 and have made it work with 8bit RGB serial and H and V sync all comming from an Altera Cyclone III FPGA ( I have the 3C120 development board)

http://www.youtube.com/watch?v=q9iltMJHbfE

Until now I have used the onchip ram in the FPGA which are exactly enough to hold a complete picture for the OLED about 390 KB

I load data from a SD Card where I have made some asm code for a PIC16F628 to read the FAT16 and send it over as SPI data to the FPGA

I all works but I would realy like to have some more speed on reading files

I still need to learn a lot on the FPGA part to do the SD card reading directly in VHDL as weel it would be nice to decode compresssed pictures or video in the future

So my question are if soume of you guys are into FPGA and have some good advice or have done something similar?


Wiljan

I can't help with the question but I like the OLED display. Mind telling me which it is?

Could You also post Your source code? Are You sure that it is not uC speed problem? Usually it is better to update only changed pixels on display, so that gives a lot of speed using FPGA.

Hi

A bit more info

The display are 4.3" 480x272 from CMEL P0430WQLA (no touch)

http://www.oled-display.net/cmel-amoled ... 080924.pdf

I got it from GLYN www.glyn.de you can also get it from farnell and RS but they are expensive

The controller build into display are HX5116-A
http://www.andilcd.de/medien/de/downloa ... hx5116.pdf

Regarding the PIC chip ... I could move to another PIC which do have build in SPI hardware this should speed up the interface to the SD card and the FPGA right now I do use bit bang for both SPI operations

I was also wondering to move 8bit in parallel to the FPGA but I'm out of pins on the the current PIC

When you ask for code I gues you mean for the FPGA? I will see what I can do since it quite a mix of different part I have merged

I think I will need to use external RAM for the FPGA to have 2 bufferes to switch between then I can build up the new image slowly and then switch

On the other hand it would be more prof to use the NIOS cpu in the FPGA and do all the control from here and gues it would be easy to have some jpg decoder in as well

Anyone into NIOS?

Here you have my top layout
http://tech2net.dk/stuff/my_first_fpga_top.jpg


Wiljan